Sige5 documents a Raspberry Pi-compatible 40-pin header, and CM5 exposes similar signal classes through its carrier. “Compatible” still requires checking voltage, alternate functions, pull states, interrupt routing and timing.
Validate one signal
gpioinfo
gpiomon --num-events=1000 gpiochip0 4
Use an oscilloscope or logic analyzer for edge-to-edge latency and jitter. A userspace GPIO loop is not a hard real-time guarantee; use kernel drivers, PREEMPT_RT or a dedicated peripheral when deadlines matter.
Migration boundary
Raspberry Pi overlays and BCM GPIO numbers do not map directly to Rockchip names. Jetson GPIO tooling is also platform-specific. Port the electrical design and device tree, then rerun EMC and timing tests with the final carrier and cable harness.
References
Pre-publication check
- Publish voltage and pin-mux evidence.
- Report jitter distribution, not a single best-case number.
- Identify where a hardware timer or MCU is required.