RKNN2 V2.5.0 · RK3576/RV1126B：Basics and convolution

This RKNN2 V2.5.0 platform reference helps ArmSoM developers select and adapt models. It does not establish support on every ArmSoM board: verify the board SoC, actual Toolkit2, Runtime, NPU driver and BSP versions. The source specifies no universal Linux kernel version. No ArmSoM hardware validation was performed.

Source: the supplied Chinese and English RKNN2 Supported Operators and Constraints Reference V2.5.0, 374 and 384 pages respectively. Chinese follows the Chinese edition; English, Russian and German follow the English edition. Platform constraints remain separate. The English PDF itself contains Chinese I/O figures and output tables; their provenance is retained with editable localized tables. Source spellings such as ConvTranpose and the original LSTM/GRU equations are preserved; these equations are not corrections to SDK implementations.

Source pages: CN 220–230; EN 227–237.

Rockchip RKNN2

Operator reference series

RKNN2 V2.5.0 · RK3566/RK3568：Basics and convolution

RKNN2 V2.5.0 · RK3566/RK3568：Recurrent networks, arithmetic and pooling

RKNN2 V2.5.0 · RK3566/RK3568：Shapes, slicing and transpose

RKNN2 V2.5.0 · RK3566/RK3568：Activations, normalization and extensions

RKNN2 V2.5.0 · RK3588：Basics and convolution

RKNN2 V2.5.0 · RK3588：Recurrent networks, arithmetic and pooling

RKNN2 V2.5.0 · RK3588：Shapes, slicing and transpose

RKNN2 V2.5.0 · RK3588：Activations, normalization and extensions

RKNN2 V2.5.0 · RK3562：Basics and convolution

RKNN2 V2.5.0 · RK3562：Recurrent networks, arithmetic and pooling

RKNN2 V2.5.0 · RK3562：Shapes, slicing and transpose

RKNN2 V2.5.0 · RK3562：Activations, normalization and extensions

RKNN2 V2.5.0 · RV1103/RV1106：Basics and convolution

RKNN2 V2.5.0 · RV1103/RV1106：Recurrent networks, arithmetic and pooling

RKNN2 V2.5.0 · RV1103/RV1106：Shapes, slicing and transpose

RKNN2 V2.5.0 · RV1103/RV1106：Activations, normalization and extensions

RKNN2 V2.5.0 · RK3576/RV1126B：Basics and convolution

RKNN2 V2.5.0 · RK3576/RV1126B：Recurrent networks, arithmetic and pooling

RKNN2 V2.5.0 · RK3576/RV1126B：Shapes, slicing and transpose

RKNN2 V2.5.0 · RK3576/RV1126B：Activations, normalization and extensions

RKNN2 V2.5.0 · RK2118：Basics and convolution

RKNN2 V2.5.0 · RK2118：Recurrent networks, arithmetic and pooling

RKNN2 V2.5.0 · RK2118：Shapes, slicing and transpose

RKNN2 V2.5.0 · RK2118：Activations, normalization and extensions

RKNN2 V2.5.0 · RV1103B/RV1106B：Basics and convolution

RKNN2 V2.5.0 · RV1103B/RV1106B：Recurrent networks, arithmetic and pooling

RKNN2 V2.5.0 · RV1103B/RV1106B：Shapes, slicing and transpose

RKNN2 V2.5.0 · RV1103B/RV1106B：Activations, normalization and extensions

RKNN2 V2.5.0 · CPU operator support and constraints

RKNN2 V2.5.0 · GPU operator support and constraints

RKNN2 V2.5.0 · Model I/O, alignment and convolution limits

RK3576/RV1126B

Add

Performs element-wise binary addition(C=A+B),supporting multi-directional NumPy-style broadcasting

Inputs

• A:T1,T2
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer
  • Broadcasting support
    • Supports broadcasting along arbitrary dimensions
    • Broadcasting constraints are the same as the Expand operator
• B:T1,T2
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer
  • Broadcasting support
    • Supports broadcasting along arbitrary dimensions
    • Broadcasting constraints are the same as the Expand operator

Outputs

• C:T1
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Data Type Constraints

• T1:int8(Tensor),float16(Tensor)
• T2:float(constTensor)

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

AddRelu

Add and Relu fused computation, C=Relu(A+B)

Inputs

• Same as Add

Outputs

• Same as Add

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

BatchNormalization

Performs batch normalization on the input tensor according to the description in https://arxiv.org/abs/1502.03167

Inputs

• input:T1
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Outputs

• output:T1
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Data Type Constraints

• T1:int8(Tensor),float16(Tensor)

Attributes

• epsilon: float (default value = 1e-5)
  • A real number added when dividing by the standard deviation to prevent division by 0
  • epsilon∈(0,∞]
• momentum:float
  • Sliding average parameters during training

Other Support

• Multi-core: Not yet supported

Concat

Concatenate a sequence of vectors into a single vector along the axis specified by axis. All vectors must be the same size except in the axis dimension

Inputs

• input_tensor:T
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Outputs

• output:T
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Data Type Constraints

• T:int8(Tensor),float16(Tensor)

Attributes

• axisint64
  • axis∈{0,1,2,3}

Convolution

Convolution

Inputs

• input_tensor:T1
  • shape:[batch,channel,height,width]
    • width: when dilated_kernel_h>1, width<16383. In addition, the first-layer input width is restricted; see the model input description for details.
  • Quantization support
    • per-layer
• weight:T1
  • shape:[output_channel,input_channel,kernel_h,kernel_w]
    • kernel_h∈[1,31]
    • kernel_w∈[1,31]
  • Quantization support
    • per-layer
    • per-channel

Outputs

• output:T1
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Attributes

• strides:int(strides_h,strides_w)
  • stride_h∈[1,7]
  • stride_w∈[1,7]
• pads:int(pads_top,pads_left,pads_bottom,pads_right)
  • pads_top∈[0,15]
  • pads_left∈[0,15]
  • pads_bottom∈[0,15]
  • pads_right∈[0,15]
• group:int
• dilations:int(dilations_h,dilations_w)
  • dilations_h∈[1,31]
  • dilations_w∈[1,31]

Data Type Constraints

• T1:int8(Tensor),float16(Tensor)

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

Depthwise Convolution

Depthwise separable convolution

Inputs

• input_tensor:T1
  • shape:[batch,channel,height,width]
    • width: when dilated_kernel_h>1, width<16383. In addition, the first-layer input width is restricted; see the model input description for details.
  • Quantization support
    • per-layer
• weight:T1
  • shape:[output_channel,input_channel,kernel_h,kernel_w]
    • kernel_h∈[1,8]
    • kernel_w∈[1,8]
  • Quantization support
    • per-layer
    • per-channel

Outputs

• output:T1
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Attributes

• strides:int(strides_h,strides_w)
  • stride_h∈[1,7]
  • stride_w∈[1,7]
• pads:int(pads_top,pads_left,pads_bottom,pads_right)
  • pads_top∈[0,15]
  • pads_left∈[0,15]
  • pads_bottom∈[0,15]
  • pads_right∈[0,15]
• group:int
• dilations:int(dilations_h,dilations_w)
  • dilations_h∈[1,32]
  • dilations_w∈[1,32]

Data Type Constraints

• T1:int8(Tensor),float16(Tensor)

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionRelu

Convolution and Relu fused computation, Output=Relu(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionClip

Convolution and Clip fused computation, Output=Clip(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionPRelu/LeakyRelu

Convolution and PRelu/LeakyRelu fused computation, Output = PRelu(Conv(Input)) or Output = LeakyRelu(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionAdd

Convolution and Add fused computation, Output=Add(Conv(Input0),Input1). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionSigmoid

Convolution and Sigmoid fused computation, Output=Sigmoid(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionTanh

Convolution and Tanh fused computation, Output=Tanh(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionSoftplus

Convolution and Softplus fused computation, Output=Softplus(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionHardSigmoid

Convolution and HardSigmoid fused computation, Output=HardSigmoid(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionHardSwish

Convolution and HardSwish fused computation, Output=HardSwish(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionElu

Convolution and Elu fused computation, Output=Elu(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionSwish

Convolution and Swish fused computation, Output=Swish(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionMish

Convolution and Mish fused computation, Output=Mish(Conv(Input)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvolutionAddRelu

Convolution and Add and Relu fused computation, Output=Relu(Add(Conv(Input0),Input1)). Description and specification constraints are the same as Convolution

Other Support

• Multi-core: RK3576 supported / RV1126B not supported

ConvTranspose

Transposed convolution

Inputs

• input_tensor:T1
  • shape:[batch,channel,height,width]
    • width: when dilated_kernel_h>1, width<16383. In addition, the first-layer input width is restricted; see the model input description for details.
  • Quantization support
    • per-layer
• weight:T1
  • shape:[output_channel,input_channel,kernel_h,kernel_w]
    • kernel_h∈[1,31]
    • kernel_w∈[1,31]
  • Quantization support
    • per-layer
    • per-channel

Outputs

• output:T1
  • shape:[batch,channel,height,width]
  • Quantization support
    • per-layer

Attributes

• strides:int(strides_h,strides_w)
  • stride_h∈[1,8]
  • stride_w∈[1,8]
• pads:int(pads_top,pads_left,pads_bottom,pads_right) Note when setting pad: kernel_hdilations_h-dilations_h-pads_top<0 is not supported; kernel_wdilations_w- dilations_w-pads_left<0 is not supported; stride_h(height-1)-pads_top+1<output_h is not supported; stride_w(width-1)-pads_left+1<output_w is not supported
  • pads_top∈[0,15]
  • pads_left∈[0,15]
  • pads_bottom∈[0,15]
  • pads_right∈[0,15]
• group:int
  • group: only 1 is supported; num_output is supported if and only if num_input=num_output
• dilations:int(dilations_h,dilations_w)
  • dilations_h∈[1,32]
  • dilations_w∈[1,32]
  • When dilation is not equal to (1,1), only kernel=(1,1) is supported

Data Type Constraints

• T1:int8(Tensor),float16(Tensor)

Other Support

• Multi-core: Not yet supported

ConvTranposeRelu

ConvTranspose and Relu fused computation, Output=Relu(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeClip

ConvTranspose and Clip fused computation, Output=Clip(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposePRelu/LeakyRelu

ConvTranspose and PRelu/LeakyRelu fused computation, Output=PRelu(ConvTranspose(Input)) or Output= LeakyRelu(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeAdd

ConvTranspose and Add fused computation, Output=Add(ConvTranspose(Input0),Input1). Description and specification constraints are the same as ConvTranspose

ConvTranposeSigmoid

ConvTranspose and Sigmoid fused computation, Output=Sigmoid(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeTanh

ConvTranspose and Tanh fused computation, Output=Tanh(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeSoftplus

ConvTranspose and Softplus fused computation, Output=Softplus(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeHardSigmoid

ConvTranspose and HardSigmoid fused computation, Output=HardSigmoid(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeHardSwish

ConvTranspose and HardSwish fused computation, Output=HardSwish(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeElu

ConvTranspose and Elu fused computation, Output=Elu(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeSwish

ConvTranspose and Swish fused computation, Output=Swish(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose

ConvTranposeMish

ConvTranspose and Mish fused computation, Output=Mish(ConvTranspose(Input)). Description and specification constraints are the same as ConvTranspose