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RK3588 power sequencing: RESETn and S0/S3

RK3588 power sequencing: RESETn and S0/S3. Explore RK3588 circuits, PCB constraints and validation with AIM7, Sige7 and LM7.

· ArmSoM Editorial · 2 min read

Based on the Chinese and English RK3588 Hardware Design Guide V1.3 (2023-02-13), for reviewing SoC boards and carriers. AIM7 and LM7 carriers must follow module interface definitions; Sige7 provides a starting point for software and peripheral validation. SoC capabilities are not a board connector list. Verify SDK/BSP, kernel, board revision and firmware. Values are source references, not ArmSoM hardware measurements.

RK3588 Hardware Design Guide V1.3 (2023-02-13), EN · §2.1.10.3; §2.2.1.2–2.2.1.3

Explicit sequences take priority

A lower-voltage-first principle does not replace explicit orders such as MIPI_D/C_PHY_VDD → 1.8V → 1.2V. Use the particular power tree, not numerical sorting. Release RESETn ≥1ms after the final rail stabilizes while meeting shared peripheral requirements. On shutdown assert RESETn before removing supplies.

Test sleep and back-powering

The fixed 1.8V and selectable-voltage pins of a domain must both belong to S0 or both S3. Measure cold start, warm reset, sleep and shutdown, checking back-power from USB, HDMI and external controllers. Module carriers follow module input and enable requirements rather than recreating internal SoC supplies.

Design parameters and review table

Item Source reference
Reset release ≥1ms after final rail stable
Power-down RESETn low → supplies off
MIPI D/C reference VDD → 1.8V → 1.2V

Source figures

The reference pages below contain the relevant circuit or timing figures; click for full resolution. Designators and component values belong to the reference design, not an ArmSoM product schematic.

RK3588 power sequencing: RESETn and S0/S3 · 2-61

English original · PDF 81 · 2-61

ArmSoM development path

AIM7 supports compute-module carrier development, LM7 targets LGA module integration, and Sige7 supports early software and peripheral evaluation. With modules, identify which supplies, DDR and boot circuits are already integrated before designing the carrier. Do not duplicate SoC reference circuits unnecessarily. Follow product documentation for connectors, exposed interfaces, voltages and system support.

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